NVIDIA simulates a 104-qubit magic state protocol on Europe's JUPITER supercomputer

What NVIDIA announced

NVIDIA said on 19 October 2026 that its researchers, working with Jülich Supercomputing Centre in Germany, ran what it calls the largest comprehensive simulation of a fault-tolerant quantum computing process to date. The run modelled a 104-qubit protocol for preparing so-called magic states and used 8,192 NVIDIA GH200 GPUs on JUPITER, the exascale supercomputer at Forschungszentrum Jülich that NVIDIA's press release describes as the largest in Europe.

The announcement landed on the same day Germany's economy and research ministries signed a physical AI declaration of intent with NVIDIA in Berlin, ahead of Jensen Huang's GTC Berlin keynote. The technical detail sits in a separate post on the CUDA-Q blog, NVIDIA's quantum software site, which explains what was modelled and how a problem that size was made to fit in GPU memory.

Huang called useful quantum computing a matter of "fantastically complex, fault-tolerant systems" and said the Jülich results show how quantum processors and GPU supercomputers can work together. Kristel Michielsen, director of the Jülich Supercomputing Centre, said Europe's investment in JUPITER lets researchers investigate questions that were previously out of reach.

Why magic states are the expensive part

Qubits are fragile. The control signals needed to operate them add noise, so any large quantum computer will have to spread each logical qubit across many physical ones and keep correcting errors as it runs. That is what fault tolerance means. Most of the operations in leading error-correction schemes belong to a family called Clifford operations, which are comparatively easy to protect and, under suitable noise assumptions, easy to simulate on ordinary computers.

Clifford operations alone cannot run every quantum algorithm, though. To get a universal machine you need at least one more kind of operation, and in most fault-tolerant designs that ingredient comes from magic states: specially prepared states, often called T states, that are consumed each time the computer performs the extra operation. A useful algorithm can burn through very large numbers of them.

Making magic states with low enough error has traditionally been a big part of a quantum computer's budget. The CUDA-Q post says producing high-quality magic states can consume a substantial share of a machine's resources and remains a significant design uncertainty, which is why understanding how their preparation reacts to hardware imperfections matters to anyone choosing a processor layout or an error-correction scheme.

What cultivation does differently

The approach NVIDIA simulated is magic state cultivation, introduced in a 2024 paper by Craig Gidney, Noah Shutty and Cody Jones of Google, arXiv 2409.17595. Instead of distilling many noisy magic states into fewer good ones in a separate factory, cultivation prepares one state inside a small error-correcting code, checks it repeatedly for faults, throws away attempts that fail the checks and grows the survivor into a larger, more robust code.

The paper says cultivation fits inside a surface code patch and uses roughly as many physical gates as a lattice-surgery CNOT of the same reliability. Compared with earlier methods, it estimates an order of magnitude fewer qubit-rounds to reach logical error rates as low as two in a billion at a uniform physical noise rate of one in a thousand. The authors suggested that further distillation may never be needed in practice. NVIDIA's release turns this into the claim that cultivation requires 90 percent fewer qubits than previous methods; the paper's own measure is qubit-rounds, which combines qubits and time.

Cultivation has moved quickly from theory to hardware. Four days before NVIDIA's announcement, Google Quantum AI reported running cultivation on its Willow chip, with about 40 times lower error than injection alone at small scale. Simulations like NVIDIA's are meant to answer a different question: how the same protocol behaves on larger, noisier hardware that does not exist yet.

What exactly was simulated

According to the CUDA-Q post, the simulated protocol starts with a distance-3 colour code, adds extra flag measurements to catch harmful faults, and then grows into a distance-7 hybrid of colour code and surface code before further rounds of error correction and readout. The 104-qubit figure counts both the data qubits and the auxiliary qubits used across that whole sequence.

The flag measurements come from recent work. The post links to a September 2026 paper by Tim Chan, Armands Strikis, Zhu Sun and Zhenyu Cai, arXiv 2609.17706, which found that distance-3 T-state cultivation has an effective fault distance of only 2, because certain hook errors turn into coherent errors after the final check. The authors designed flags to detect those errors and report a 4.9-fold improvement in the logical error rate before code growth at a noise level of one in a thousand, at the cost of 1.36 times more attempts per accepted state.

The noise model is what makes NVIDIA's run expensive. Many error-correction studies assume random bit and phase flips, which ordinary stabiliser simulators handle efficiently. NVIDIA instead modelled coherent phase errors, which can build up and interfere, and leakage, where a superconducting qubit escapes its two working energy levels. Selected sites were modelled with a third level to capture leakage, and the non-Clifford operations that create the magic state were kept in full rather than approximated.

Fitting 104 qubits onto 8,192 GPUs

A full description of a quantum state doubles in size with every qubit, and a third energy level makes it worse. Storing 104 qubits directly is far beyond any computer. The CUDA-Q post says the team got around this by reorganising the circuit's operations while preserving their dependencies and measurement statistics, and by reusing memory as qubits are measured and released, so the state being stored at any moment is much smaller than the full protocol.

It also packs groups of three-level systems into binary storage that NVIDIA's cuStateVec library can handle. Five three-level systems have 243 possible states, which fit into eight binary bits with 256 slots, wasting little space.

In the 8,192-GPU configuration, the post says, a 45-bit encoded register represents about 35.2 trillion complex amplitudes. In double precision the state alone takes 512 tebibytes of distributed GPU memory, or 64 gibibytes per GPU, leaving room for communication and analysis. Those figures are consistent: two to the power 45 is about 35.2 trillion, and at 16 bytes per complex number that is exactly 512 tebibytes, split evenly across 8,192 GPUs.

The software stack is NVIDIA's own. The circuit was written with the fault-tolerant logical layer of the CUDA-Q platform and executed with cuQuantum. The team also built distributed factorisation tools on cuBLASMp and cuSOLVERMp to examine slices of the stored state and estimate how much information a more compact, approximate representation would need to keep.

How the team checked its answers

Development did not happen on JUPITER alone. NVIDIA says a GB200 NVL72 system at its Accelerated Quantum Research Center, known as NVAQC, served as the test bed, letting researchers scale from four GPUs to hundreds before moving to the full JUPITER run. The press release says this cut a simulation effort that would have taken weeks down to days.

On small packed circuits at NVAQC, independent state-vector and tensor-network calculations agreed on measurement probabilities to about one part in ten trillion once the tensor-network truncation was tightened, according to the CUDA-Q post. That cross-check matters because the long-term plan is to use the exact state-vector runs as a reference for cheaper approximate methods, which could then handle bigger protocols.

NVIDIA frames the JUPITER job as one part of a wider campaign in which smaller runs act as a yardstick for estimating the memory, time and GPU-hours that larger experiments will need. Adding one binary storage bit doubles the state's memory, the post notes, but run time also depends on gate placement, communication and the analysis requested.

What the announcement does not say

For all the detail on method, neither post reports the scientific result: there are no logical error rates, acceptance rates or comparisons between noise models, and no paper or data set was linked when AI Lookout checked on 20 October. The claim that this is the largest comprehensive simulation of a fault-tolerant quantum processor is NVIDIA's own, and the release credits an earlier Jülich study with simulating 50 qubits under ideal, noiseless conditions as the main point of comparison.

NVIDIA also says the work could shorten the path to viable quantum computers by years and help applications in drug discovery, finance and materials science. Those are expectations, not measured outcomes. A simulation tells designers how a protocol should behave under a chosen noise model; real devices can have errors the model leaves out.

There is a small inconsistency in the CUDA-Q post, which describes the main run as using 8,192 GPUs in most places and as an 8,912-GPU job once. AI Lookout uses 8,192, which matches the press release and the memory arithmetic. The post does not say how long the largest run took or how many GPU-hours it used. AI Lookout has not run any of the code.

Why it matters

The cost of magic states is one of the biggest open variables in estimates of how large a useful quantum computer must be. If cultivation holds up under realistic noise, including leakage and coherent errors, the number of physical qubits needed for practical algorithms could drop sharply. Detailed simulations are one of the few ways to test that before the hardware exists.

The announcement also shows where GPUs fit in quantum research: as the classical machines that design, check and eventually help run quantum ones. AI is entering the same loop from another direction, as with Claude Mythos 5 designing cheaper quantum circuits last week. The next things to watch are whether NVIDIA and Jülich publish the error rates from the run, whether the tools appear in CUDA-Q, and whether hardware groups use them to tune real processors.